Edmund Humenberger @ico_TC
World Joined January 2016-
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Via-in-Pad in BGA 🆚 Without Via-in-Pad in BGA . 📢JLCPCB is offering free Via-in-Pad for 6-layer PCBs! ✈️Upgrade your project now! #jlcpcb
Via-in-Pad in BGA 🆚 Without Via-in-Pad in BGA . 📢JLCPCB is offering free Via-in-Pad for 6-layer PCBs! ✈️Upgrade your project now! #jlcpcb https://t.co/6k3t9iTBdY
The Muse Book 14.1-inch #Linux (Debian) laptop will be powered by a SpacemiT K1 octa-core #RISCV CPU with a 2 TOPS NPU, up to 16GB RAM, eMMC/SSD storage, WiFi 6, a few USB ports, and an 8-pin GPIO header. Pricing will start at about $300. #ChinaTech #AI cnx-software.com/2024/04/30/mus…
Okay, no French ground troops to my house, otherwise @LambdaConcept ECPIX-5 Rev3, test run of my KianV CPU with #LiteX @enjoy_digital and 110MHz CPU frequency on 440MT/s 512MiB DDR action. Why? I bought it to implement a DDR controller, but very slowly, as BMX has priority. The…
@gorilla0513 When I first wrote SQLite, I didn't know much about SQL database engines. But I was familiar with compilers. So it was natural for me to treat the problem of writing an SQL database engine as a compiler-construction problem. Hence, SQLite compiles SQL into byte-code.
Boom! RISC-V linux kernel 6.8.8 KianV Linux Soc
Git update alert, the #KianV RISC-V RV32IMA SV32 (MMU) Linux SoC is running with the latest Linux Kernel 6.8.8. I think this is the RISC-V Linux SoC with the newest kernel on Earth. :) #logicDestroyer #linux #riscv #fpga #mmu #rv32 #sv32 #homemade #latesLinux on earth…
My @GnuOctave simulations look way better, I have to find out where the deficits of my hardware implementation are.
@BMenkuec My main point is that in 7000 series the FPGAs often have comparatively more DSPs than logic (this depends a lot on the application, though). And in UltraScale+ the logic vs DSPs balance leans even more towards DSPs.
Very excited to share our work on SIGGRAPH 2024: CWF: Consolidating Weak Features in High-quality Mesh Simplification. Proj: ruixu.me/html/CWF/index… Code: github.com/Xrvitd/CWF (some star pls) Paper:arxiv.org/abs/2404.15661 YouTube:youtu.be/QpTY-cHJJRU
Finished the I2S to SPI converter. The voltage of the step-down converter is now controlled by the left audio channel. Raspbian and GNU Radio run on the #EBAZ4205 itself. youtu.be/IL3EYi9xvG0
Testing my FPGA-based (digital) frequency/phase modulator. Fascinating what dithering can do. Unmodulated carrier first, then NFM transmission.
After fixing a placement mistake that blocked the I2C, my Glasgow Interface Explorer passes the UART test (with a FT232 as remote side, oh the sweet irony)
#GRAVES #meteorscatter (Ignore the line next to it, that's a harmonic from my FPGA board running on my desk)
I worked on MS-DOS, but not this one! Microsoft has open-sourced MS-DOS 4.00 on Github, but it might not be what you think it is. MS-DOS 4.00 was an attempt at a multitasking MS-DOS, but OEMs weren't really interested, and it was only ever in limited release. So it's almost…
@WCH_TECH , anybody. how can I flash my CH32V305 using FT2232 dongle? please help!
#MFKyoto2024 準備できた
Hey @mikrotik_com - I believe there is a huge potential for your cloud switches for Telco/#ORAN usecases if they only had better PTP support. The HW is quite capable but we've spotted a few SW and config issues that make them unusable in some cases.
Ken Shirriff @kenshirriff
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21 Followers 193 Following The Global Innovative Delivery Platform. Platform Di. Created in Ukraine.Matthias Blaicher @underst0rm
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104 Followers 2K Following life is beautiful {polymath} 🛸💻📈 || MechEng, Physics and Computer Science||@langstron.bsky.socialddjjdjx63737 @73737337hddhej
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25K Followers 161 Following What's in your chip??? Original photography & IC decaping by Antoine Bercovici Vintage computer & Macintosh enthusiast CC BY-NC-SA 4.0Adam Taylor @ATaylorFPGA
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9K Followers 1K Following @[email protected] Inria Research Director / Computational Physics/Cosmology / Scientific Director of Program Inria Quadrant / #riscv ambassadorJan Gray @jangray
5K Followers 2K Following computing with FPGAs; ex MS dev tools architect; https://t.co/raSpGdhYZ3; https://t.co/xpX0gKABG6; https://t.co/i8BjreGEmx; co-chair RVI SIG-SOFT-CPULukas Henkel @QVHenkel
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5K Followers 417 Following Researcher-maker-hacker focusing on Computer Graphics with a #retro, #fpga gaming twist. Enjoys #3dprinting and #electronics. Created @iceslapp and #Silice.Will Green @WillFlux
3K Followers 832 Following Only hardware makes it possible! FPGA, RISC-V, 68K, OS, graphics, demos. DMs are open (be kind). He/Him 🦣 https://t.co/hoDeBTqKT0Mirosław Folejewski .. @Mirko_DIY
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7K Followers 133 Following Physicist, Telecom Engineering lover, HPC Enthusiast. Prog Rock/Metal fan.Victor Suarez Rovere @suarezvictor
2K Followers 781 Following Software, Electronics, DSP. Ready for consulting work. [email protected] / @[email protected]Weston Braun @WestonBraun
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4K Followers 113 Following The M17 Project - Open Source Digital Radio IRC/Discord/Matrix: https://t.co/h24P1qh99p YT: https://t.co/I8zjmf4Mv1Jim Keller @jimkxa
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705 Followers 110 Following Amateur Radio Digital Communications (ARDC) manages the 44.*.*.* IP address space and awards grants to cool #hamradio and tech projects.Vlad @vladsaye
1K Followers 1K Following Building freedom and privacy into infrastructure from the ground up. Founder: Fosa @fosatechKanade @kanade_k_1228
3K Followers 2K Following でんきであそぼ!電子工作→自作マイコン→自作FPGA IDE→AI / 未踏23 / 1陸技 / ニコニコ技術部 https://t.co/Rp9hZRcy0n / YouTube https://t.co/xPJrnILT11Michał Kubecki @MichalKubecki
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6 Followers 188 Followingリニア・テック.. @linear_tec
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2K Followers 10 Following - We build radios and software to support the next 10 billion wireless devices. - Dedicated to improving freedom, privacy, and independence through technology.Dennis M S 🗿 @neo4reo
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2K Followers 483 Following 超リアルタイムコンピューティングを目指して、ソフト/FPGA/基板設計、オリジナルのAI(微分可能回路によるLUT-Net)まで手広くやってる福岡在住のプログラマです。転職しましたが引き続き副業OKです。 各種成果物は GitHub などからどうぞ。https://t.co/JwcLL8OsrLsh4 @sh4forever
319 Followers 30 Following Working on the Dragon "fantasy console" for #fpga. graphics, hardware design, music, emulationI have a sadistic urge to test how various feature matchers and stereo matching algorithms perform on scenes like this. 😅
I've been following @splinedrive with interest for a while now and I've finally decided to get myself an fpga board! I know nothing about fpga. But implementing a riscv core myself seems like a good learning project, since I studied it in a computers architecture course in uni..
Okay, no French ground troops to my house, otherwise @LambdaConcept ECPIX-5 Rev3, test run of my KianV CPU with #LiteX @enjoy_digital and 110MHz CPU frequency on 440MT/s 512MiB DDR action. Why? I bought it to implement a DDR controller, but very slowly, as BMX has priority. The…
(I'm stuck in a train that is more than 2 hours late, I'm not concentrated enough for doing physics and lacking coffee for that, but programming new viz tools and posting on twitter still works...)
Git update alert, the #KianV RISC-V RV32IMA SV32 (MMU) Linux SoC is running with the latest Linux Kernel 6.8.8. I think this is the RISC-V Linux SoC with the newest kernel on Earth. :) #logicDestroyer #linux #riscv #fpga #mmu #rv32 #sv32 #homemade #latesLinux on earth…
無事に終了しました。大変面白かった。みんなに感謝したいと思います。 Thank you very much for your appreciation. #MFKyoto2024
I'm grateful to @PeterMorganQF for recommending this book on the history of time keeping - a worthy successor to Arthur C.Clarke's How The World Was One (long out of print). Excellent history of science, technology, and politics.
@F5OEOEvariste It's work in progress, but I'm planning to release it.
@BMenkuec My main point is that in 7000 series the FPGAs often have comparatively more DSPs than logic (this depends a lot on the application, though). And in UltraScale+ the logic vs DSPs balance leans even more towards DSPs.
The build in OS does a few simple things, such as dumping registers on a crash. A proper debugger stub is coming later:
#GRAVES #meteorscatter (Ignore the line next to it, that's a harmonic from my FPGA board running on my desk)
Hey @mikrotik_com - I believe there is a huge potential for your cloud switches for Telco/#ORAN usecases if they only had better PTP support. The HW is quite capable but we've spotted a few SW and config issues that make them unusable in some cases.
My first reasonably complicated FPGA development kit was the Arria II GX PCIe board. I was able to bring up the onboard DDR2, DDR3 and the PCIe hard IP in 2019 but I never quite got the SSRAM on the FSM bus to work. Tonight I got it working easily. I'm not sure where I got stuck…
This virtual motion works in a "non classical way" to get wavy interference, meaning there is no exterior restoring force generating SHM, only interior phase memory. So agent spacetime with simple memory exhibits linear interference as well as Bell/Aspect behaviour!
GORYN v1.0.0 board is up and running. PCB done by @elecrow . @GOWIN_SEMI FPGA QFN 0.4mm is kinda hard to solder by hand. github.com/AI6YP/goryn and it's now got @oshwassociation certificate!
@suarezvictor @ultraembedded And I concur, his developments are *absolutely amazing* (OoO core, mpeg decoder, small self-contained library for accessing FAT filesystems, exactstep clocktick accurate simulator for RiscV ...), @ultraembedded we miss you 😀